Dr. William A. (Bill) Hanna
Name: William A. Hanna
Job Classification: Engineer/Scientist 6
Title: Technical Fellow-Electronics/Software
Principal Investigator: Advanced Avionics R&D
B.Sc. EE Cairo University; Cairo, Egypt July 1976,
B.Sc. (Pure) Math; Cairo University, Cairo, Egypt; June 1969
M.S.-EE (Math minor); Iowa State University; Ames, Iowa December 1971
Ph.D. EE (CS minor); Montana State University; Bozeman, MT; May 1974
Function: Advanced Systems & Technology- Phantom Works (AS&T-PW)
Boeing; St. Louis, Missouri
Address: MC: S102-1310
P.O. Box 516
St. Louis, MO 63166-0516
Phone: (314) 233-1678
1. Design Manager for Small UAV Mission Planning & Controls (H/W & SW) (2002-Present)
2. Avionics Leader for Preliminary Development of Avionics Subsystem for MALD ( Miniature Air-Launched Decoy ); Job included planning and supervision of work in Software, Electronic Hardware, and Digital Controls.
3. Design Manager and implementer for the Controls (H/W & SW) of the IntelliBus (Intelligent Bus); A Boeing invention for the controls and distribution of digital information for up to 1024 sensors at variable data rates (2000-2001).
4. Design of Digital Interface (H/W & SW) for ITRAN Communication over Power Line Modem using VHDL Tools; 1999-2000. We have a working design in the AAC Lab. 1999-2000
5. Improving Data Communications in Avionics by using new approaches to data communications such as RF, IR, and COMM over Power Line for Avionics. 1998.
6. PI for Howard University R&D Avionics Project (Howard university CS Dept.). Investigated, modified, and measured the performance of Fibre Channel (ANSI 3T8) software and drivers (firmware) for high speed communications (above 1 Gbps Serial Comm); 1996-1999.
7. Insertion of COTS Avionics into Boeing Products. IRAD work resulted in the selection of C++ (to replace Ada), VxWorks (A Unix Subset) to replace proprietary OS, VME (Versa Module Electronics, a European Standard for parallel I/O) to replace proprietary parallel bus and arbitration, Power PC (to replace embedded proprietary military microprocessor). Products developed by Dy-4 (commercial electronics vendors) for three platforms, namely, F/A-18, AV-8B, and F-15. This VME product is replacing Mission Computer and Display Processor Military Hardware with more affordable Industrial Hardware; The corresponding software is C++ based to replace assembly language code; 1996-1998.
8. Team Leader for the testing of FC (Fibre Channel) communications systems for EMC (Electromagnetic Compatibility) of boards, cables, and subsystems.1996.
1. Developed Methodology for ASICS Validation & Verification using VHDL (an Ada Subset) under AF Contract based on the experience with Kaiser Electronics and Hughes Radar Systems Group; 1996.
2. Validation and Verification (V&V) of 7 ASICS in the F-15 Radar Upgrade (APG63V1). Worked with Hughes Now Raytheon Radar Systems Group on developing tests in VHDL (an Ada Subset) for the V&V of all New ASICs; 1995-1996
3. Worked with Kaiser Electronics, San Jose, CA on Validation & Verification of 7 ASICS in the F/A18-E/F new Displays Controls MPCD & UFCD. 1994-1995.
4. Team Leader IRAD; Development of ASICS for Multiprocessor System for Avionics; 1993.
5. Technical manager of the design of the Fiber Optic Link for the Space Station that was developed based on 30-Years Use in Space requirement. Also supervised the development of a prototype of a fiber optic distribution network for digital video with a bandwidth greater than 500 MHz requirement. 1992-1993.
6. Team Leader IRAD, Development of Analog/Mixed Signals ASICS, GaAs ASICS; Power Converter Hybrid, and FPGAS for Advanced Air to Air Missile and Laser Altimeter. 1988-1991
7. Team leader on the development of McDonnell Douglas 1750A Microprocessor Chipset, the MD281 and the follow on of the MD281 including several missile and aircraft mission computers. We developed the first reconfigurable guidance and Navigation system using Xilinx FPGAs in 1987. 1981-1988
1. Advanced Computer Systems Design/Computer Systems Architecture courses at the University of Missouri Rolla-St. Louis Graduate Engineering Center as Adjunct Professor EE/Computer Engineering (EE-314, 315, 414, 415).
2. I also teach two VIP (Voluntary Improvement Program) courses at Boeing on the Use of VHDL (an Ada Subset). Under VIP taught VHDL to over 250 engineers in the last 10 years.
3. Taught Operating Systems Design using Pascal at Boeing, VIP Program (1982-1984).
4. Taught Programming with Style, Boeing VIP (1983).
5. Taught Electronics Design, SIU-E (1985-1989).
6. Taught Mathematics, EE, and CS (Basic, APL) at Cairo University, Iowa State University, and Montana State University (1967-1974).
Author and/or co-author of over 60 published Papers and Technical Reports on Electronics (HW & SW) Design and Design Automation. Senior Member of the IEEE, and is a voting member of the Computer Society’s Design Automation Standards Subcommittee (IEEE-DASC).
Previously a member of the technical Staff at Hewlett-Packard, Loveland Colorado (1974-1981) where I participated and was co-inventor of the first generation of desktop computers, namely HP9825, 26,31,35. Designed hardware and developed operating system and device controls software for the four mentioned products starting trends in the use of unified mass storage controls (drivers software) and the use of PASCAL to replace assembly language for system programming. I also was involved in the certification of 19 pieces of equipment for EMC under the European organization VDE which is more stringent than North American EMC organizations.
William A. Hanna; Ph.D.
Boeing Phantom Works
St. Louis, MO 63166-0516
Publications (Partial List)
1. W.A. Hanna, D.C. Chaney, M. A. Weeks; “SOC (System on a Chip) Technology Challenges for Aerospace;” Boeing Technical Excellence Fifth Conference (BTEC-5); Seattle, Washington; 22-24 July, 2003.
6. W.A. Hanna; “System on a Chip (SOC) Technology Use to Increase Boeing Products Value: A Presentation of the State-of-the-art in Electronics Design and Design Automation;” Boeing Technical Excellence Fourth Conference (BTEC-4); Anaheim, California; 4-6 February, 2002.
7. W.A. Hanna; “Progress Report: The Use of Multiplexing and Communication Over Power Line(COPL) to Reduce Weight and Size of Wiring and Increase Reliability of Air/Space Vehicles;” Boeing Third Annual Technical Excellence Symposium; Ritz Carleton Hotel, Clayton, MO; February 2001.
8. W.A. Hanna: “The Use of Multiplexing and Communication Over Power Line(COPL) to Reduce Weight and Size of Wiring and Increase Reliability of Air/Space Vehicles;” Boeing Second Annual Technical Excellence Symposium; Beverley Hotel, Beverley Hills, CA February 2000.
9. W.A. Hanna; Mark W. Macke; Michael A. Martinez; and Richard Traversy “Performance & Behavior Modeling of Electronic Subsystems;” 18th Digital Avionics Systems Conference (DASC 18th); St. Louis, Missouri; September 1999.
10. W.A. Hanna; “COTS Initiative & Cost of S/W for Aging Avionics upgrades;” Digital Avoinics Systems Conference (AIAA/IEEE); Irvine, CA; OCT 26-30; 1997.
11. W.A. Hanna, J.M. Gladden, and M.W. Macke (MDA); M. Cofer, and Y. Kubba (Kaiser Electronics); “Lessons Learned: The Use of VHDL in the Development of Seven ASICs for the Operation of Displays on the F/A18-E/F Aircraft.”, VHDL Users International Forum, VIUF- Fall ‘96; Durhan, NC, 28-31 OCT ‘96.
12. 2. W.A. Hanna, "Applying VHDL to Design and Learning of Digital Electronics and Computer Systems"; International Conference on Simulation in Engineering Education, Tempe, AZ, 24-26 Jan. 1994. (VHDL Simulation of the Fiber Optic Link in VHDL is Used as an Example in this paper)
13. 3. W.A. Hanna; "The Use of VHDL as the Data Base for the Complete Electronic Hardware Design Cycle"; Simulation Multi-Conference; 26th Annual Simulation Symposium, Arlington, VA, 29 March-1 April 1993 [Also Appears, Proceedings International Conference On Microelectronics, ICM'92, Monastir, Tunisia, Dec 92].
14. 4. W.A. Hanna, R.A. Kaskowitz, L.N. Wallace; " Evaluating VHDL- Based ASIC Synthesis Tools"; Fifth Annual IEEE-International ASIC Conference, Rochestser, N.Y., SEP'92.
15. 5. W.A. Hanna; "An Evaluation of a RISC Computer, the IBM RISC 6000"; MDC Internal Report shared with IBM and GenRad Inc., 1991.
16. 6. W.A. Hanna; "Simulation and Formal Description of the FCE Gate Array in VHDL"; VHDL Users Conference, Cincinnati, Ohio, April 1991.
17. [Also, presented at International Conference On Microelectronics, ICM'91, Cairo, Egypt, DEC'91].
18. 7. W.A. Hanna; "Built-In Test (BIT) Development: A Hierarchical Methodical Approach (Preliminary)"; MDC Report #MDC E3509, 1 OCT 90.
19. 8. G. Shao and W.A. Hanna, "Soft Prototyping in the Design of Military Electronics;" NAECON90, Dayton, Ohio, May 1990.
20. 9. W.A. Hanna; "Improvements in Electronic Hardware Design Productivity through Design Automation and the Use of Simulation"; NAECON89, Dayton, Ohio, May 1989.
21. 10. W.A. Hanna; "Improvements in Electronic Hardware Design Productivity through Design Automation and the Use of Simulation"; NAECON89, Dayton, Ohio, May 1989.
22. 11. W.A. Hanna, G. Shao, S.E. Thielker; ""Generic" ASIC Design: A Sensible Methodology for Rapid Insertion of VHSIC/VLSIC Technology"; NAECON 88, Dayton, OH, May 23-27, 1988.
23. 12. W.A. Hanna, G. Shao, S.E. Thielker; "The Architecture and VHSIC Implementation of a Digital Fin Actuator Controller for Advanced Missiles"; NAECON 87, Dayton, OH, May , 1987.
24. 13. W.A. Hanna and J.D. Vantrease;"The Use of VHSIC/VLSIC Gate Arrays in Improving Military Digital Electronics"; NAECON 86, Dayton, OH, May 19-23, 1986.
25. 14. R. Koga, W.A. Kolasinski, M.T. Marra (Aerospace Corp.), and W.A. Hanna (McDonnell Douglas); "Techniques for Microprocessor Testing and SEU-Rate Prediction"; IEEE Transaction on Nuclear Science, vol. NS-32, No. 6, Dec 1985.
26. W.A. Hanna, J.D. Vantrease, G.W. Robnett, W.A. Kolasinski, and R. Koga, "SEU Tolerance of McDonnell Douglas' CMOS/SOS High Performance, 3 Chip Implementation of MIL-STD-1750A Instruction Set", GOMAC85, Orlando Fl., Nov 5-7 1985.
27. S.K. Vermani, C.L. Balestra, W.A. Hanna, and J.D. Vantrease; "Total Dose Radiation Tolerance of McDonnell Douglas CMOS/SOS High Performance, 3 Chip Implementation of MIL-STD-1750 Instruction Set," presented at Hardened Electronics and Radiation Effect
28. [Also appears in the Digest of Papers: Government Micro Electronics Agencies Conference (GOMAC); Las Vegas, Nevada; Nov 1984].
29. W.A. Hanna; "A CMOS/SOS, 3 Chip Implementation of the MIL-STD-1750A Instruction Set and a 4 Chip Mega-Rad-Hard Equivalent;" NAECON; Dayton, Ohio; May 1983.
30. W.A. Hanna, and P. Panagos;"Radiation Immune Ram Semi-Conductor Technology for the 80's, NAECON, May 1983.
31. R.E. Meyer, W.A. Hanna, and P. Panagos, "Radiation Immune Ram Semiconductor Technology Survey", MDC Report # E2485 under contract for NASA Goddard Space Flight Center, Jan 1982.
32. 20. W.A. Hanna, J.D. Vantrease, K.D. Reynolds, and L.N. Wallace; "A Proposed Design Approach for VLSIC/VHSIC Based on McDonnell Douglas Corporation's 1750A Chip Set Design Experience;" AIAA Computers in Aerospace IV Conference; Hartford, Connecticut; Oct 82.
33. T.L. Rasset, W.A. Hanna, and L.N. Wallace; "A High-Speed MIL-STD-1750A CMOS/SOS Microprocessor;" 5th Digital Avionics Systems Conference; Seattle, Washington; Oct, 1983.
34. W.A. Hanna; "Mass Storage Mgmt Software, A Unified Approach"; HP Journal, June 1980.
35. W.A. Hanna; "Parallel Algorithms for Solving Matrix Oriented Problems"; Euro Micro, 1978
36. W.A. Hanna; Assembly Language for a Three Dimensional Computer"; Euro Micro; 1976.
37. D.E. Rodberg, and W.A. Hanna; "System Organization of a Three Dimensional Computer"; Journal of Electrical & Computer Engineering, 1975.
38. W.A. Hanna; "Register Transfer Level Design and Software Simulation of a Parallel Processor (The Three Dimensional Computer)"; Ph.D. Thesis and Office of Naval Research Report, MSU, Bozeman, Mt.; 1974.
39. W.A. Hanna; "Analog Digital Conversion System Design Consideration"; M.S. Thesis; ISU; Ames, IA; 1971
40. W.A. Hanna; "Transistorized Radio Public Address System Design"; Dept. of Electrical Engineering; Cairo University; Cairo Egypt; July 1967.
[I also produced 20 IRAD Reports related to COTS Avionics, Advanced Avionics Architecture, Computer Systems Design for Military Aircraft/Missiles, Weapons and Space Radiation Effects on Electronics, Circuit Design, Design Automation, and Military Electronics. These reports are controlled by MDC (Boeing) and DoD].